Capacitive Sensor Interface with Electrically Floating Target


Accurate, cost-efficient, and suitable to be implemented in  modern  IC  technology: capacitive sensing  is a  good  candidate for  measuring displacement in  industrial applications, where small change of displacement is translated into  change of  capacitance.

Standard interface solutions require the target electrode to be connected either to the interface or to ground.  However, in some industrial applications, there are practical limits for making this type of (electrical) connection to the target electrode. This leads to the issue of measuring displacement with one floating target electrode with two main implications: (1) since the floating target is not electrically connected to any known potential, a parasitic capacitor will couple the floating target electrode to the outside world; (2) the parasitic capacitance is not well-defined and can easily changed with respect to time, temperature and environment, affecting the stability of the measurement. What is worse, the parasitic capacitance enables the coupling path for outside noise.

This noise, along with the magnitude and frequency range, which are both unpredictable, will be coupled to the signal path via this parasitic capacitance and will thus greatly affect the functionality of the interface.

In the project a capacitive   measurement technique will be investigated based on floating target. This technique reduces the leakage effect caused by the floating target and is immune to external interferences. However, a significant offset is introduced, which deteriorates the measurement range and the long term stability. The main target of the project will be to study possible methods eliminating the above-mentioned drawbacks.

During the execution of the project, the MSc student will obtain knowledge in the fields: metrology, displacement measurement, electronic instrumentation, sensor interfaces, and analog circuit design. He/she will get an experience in system-level electronic circuit analysis and design, as well as in the complete trajectory of an IC design process.


Stoyan Nihtianov