MSc thesis project proposal

[2024] High-Efficiency DC-DC Converters for Isolated Power Charging

With the growing demands in industrial, automotive, grid-tied, and medical applications, galvanically isolated DC-DC converters are gaining more and more attention in the industry. They can provide galvanic isolation between high-/low-voltage domains while being able to transmit power across the barrier, which plays a critical role in protecting human beings and low-voltage control/sensing/communication circuits in hazardous environments.

Traditional discrete solutions tend to use a bulky transformer as the isolation barrier for providing watt-level power with 70%–80% efficiency, but the transformer also becomes the primary bottleneck for these designs to be further miniaturized to package level. Recently, emerging research has led to the development of in-package/on-chip solutions. However, the efficiency in all these designs only peaked at 7%–53%. This is mainly because of either the low-quality factor of the integrated transformers or unoptimized power path structures. In addition to the efficiency limitations, closed-loop voltage regulation with fast dynamic response is another challenge in isolated DC-DC converter designs. Some designs operated completely in an open loop or only achieved voltage regulation at the receiver side by a low dropout regulator (LDO), with the primary side operating at an open loop. A high-performance system-level close loop operation is, therefore, highly in demand.

In this project, we are going to design a highly efficient isolated DC-DC power converter system ASIC to address the above limitations.


[1] J. Tang, L. Zhao and C. Huang, "A 68.3% Efficiency Reconfigurable 400-/800-mW Capacitive Isolated DC-DC Converter with Common-Mode Transient Immunity and Fast Dynamic Response by Through-Power-Link Hysteretic Control," 2022 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2022, pp. 1-3, doi: 10.1109/ISSCC42614.2022.9731748.

[2] Y. Zhuo et al., "A 52% Peak Efficiency > 1-W Isolated Power Transfer System Using Fully Integrated Transformer With Magnetic Core," in IEEE Journal of Solid-State Circuits, vol. 54, no. 12, pp. 3326-3335, Dec. 2019, doi: 10.1109/JSSC.2019.2940333.

[3] L. Chen, J. Sankman, R. Mukhopadhyay, M. Morgan and D. B. Ma, "25.1 A 50.7% peak efficiency subharmonic resonant isolated capacitive power transfer system with 62mW output power for low-power industrial sensor interfaces," 2017 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2017, pp. 428-429, doi: 10.1109/ISSCC.2017.7870444.


1. Literature review of DC-DC converter topologies and associated power management circuits.
2. Design and tape out a highly efficient ASIC for the proposed DC-DC converter. 


You should be familiar with analog IC design and Cadence environment. If you are interested, please send the following documents to Sijun Du at email:

  • Your up-to-date CV
  • BSc transcripts
  • MSc grades (obtained to date)

Suggested courses to appear in your IEP:

  • Analog Circuit Design Fundamentals
  • Measurement and Instrumentation
  • Analog CMOS Design 1 and 2
  • Digital IC Design 1 and 2
  • Analog Integrated Circuit Design

Not a must in your IEP, but you are encouraged to learn some course materials at least:

  • Nyquist-Rate Data Converters
  • Power conversion techniques in CMOS technology (Only the SMPC and SCPC parts)
  • Semiconductor Device Physics



dr. Sijun Du

Electronic Instrumentation Group

Department of Microelectronics

Last modified: 2024-03-01