Chao Chen
Publications
- A Pitch-Matched Transceiver ASIC with Shared Hybrid Beamforming ADC for High-Frame-Rate 3D Intracardiac Echocardiography
Yannick M. Hopf; Boudewine W. Ossenkoppele; Mehdi Soozande; Emile Noothout; Zu-Yao Chang; Chao Chen; Hendrik J. Vos; Johan G. Bosch; Martin D. Verweij; Nico de Jong; Michiel A. P. Pertijs;
IEEE Journal of Solid-State Circuits,
Volume 57, Issue 11, pp. 3228--3242, November 2022. DOI: 10.1109/jssc.2022.3201758
Abstract: ...
In this article, an application-specific integrated circuit (ASIC) for 3-D, high-frame-rate ultrasound imaging probes is presented. The design is the first to combine element-level, high-voltage (HV) transmitters and analog front-ends, subarray beamforming, and in-probe digitization in a scalable fashion for catheter-based probes. The integration challenge is met by a hybrid analog-to-digital converter (ADC), combining an efficient charge-sharing successive approximation register (SAR) first stage and a compact single-slope (SS) second stage. Application in large ultrasound imaging arrays is facilitated by directly interfacing the ADC with a charge-domain subarray beamformer, locally calibrating interstage gain errors and generating the SAR reference using a power-efficient local reference generator. Additional hardware-sharing between neighboring channels ultimately leads to the lowest reported area and power consumption across miniature ultrasound probe ADCs. A pitch-matched design is further enabled by an efficient split between the core circuitry and a periphery block, the latter including a datalink performing clock data recovery (CDR) and time-division multiplexing (TDM), which leads to a 12-fold total channel count reduction. A prototype of 8×9 elements was fabricated in a TSMC 0.18- μm HV BCD technology and a 2-D PZT transducer matrix with a pitch of 160μm , and a center frequency of 6 MHz was manufactured on the chip. The imaging device operates at up to 1000 volumes/s, generates 65-V transmit pulses, and has a receive power consumption of only 1.23 mW/element. The functionality has been demonstrated electrically as well as in acoustic and imaging experiments. - Transceiver ASIC Design for High-Frame-Rate 3D Intracardiac Echocardiography
Yannick M. Hopf; Boudewine Ossenkoppele; Mehdi Soozande; Emile Noothout; Zu-Yao Chang; Chao Chen; Hendrik J. Vos; Johan G. Bosch; Martin D. Verweij; Nico de Jong; Michiel A. P. Pertijs;
In Proc. IEEE International Ultrasonics Symposium (IUS),
2022. - Front-End ASICs for 3-D Ultrasound: From Beamforming to Digitization
Chao Chen;
PhD thesis, Delft University of Technology, April 2018. - Energy-Efficient Self-Timed Zero-Crossing-Based Incremental Delta-Sigma ADC
Chao Chen;
MSc thesis, Delft University of Technology, November 2012.
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